Stanford
McIntyre Lab

Research Areas

Device Interfaces

We are engaged in studies of interfaces that form between deposited metal oxides and various semiconductor bulk crystals and nanostructures, including Si, GeSn and semiconducting In2O3.  Much of this work is motivated by the need to improve the energy efficiency of computing, which prompts interest in new high permittivity dielectric materials and ferroelectric oxides and new semiconductors for the transistor channel. Making interfaces with low areal densities of electronic carrier traps is essential for efficient operation of such devices. Our group studies the role of deposition conditions, process chemistry, post-deposition annealing on the stability of these oxide/semiconductor interfaces, and the defects they form. We also investigate methods for protecting semiconductor surfaces during metal oxide deposition and for post-deposition passivation of interface defects.

Atomic Layer Deposition

Atomic layer deposition (ALD), a method of surface adsorption-limited chemical vapor deposition, is renowned for its ability to deposit ultra-thin and pin-hole free films on a wide variety of substrates. We are investigating various applications of ALD in ferroelectric memories, metal oxide semiconductors, and in synthesis of ultrathin electrocatalyst coatings. Use of ALD to prepare thin film alloys and compositionally graded structures is a major aspect of our research.  Another important theme in this work is to exploit and investigate possible changes in the functional properties of these layers as their thicknesses reach nanoscale dimensions.

 

Semiconductor Nanostructures

We are engaged in studies of nanoscale crystal growth, with particular attention given to Group IV nanowires (NWs), such as Ge NWs, Ge-core/Si-shell NWs, and GeSn NWs. These unique, molecular-scale structures exhibit fascinating electronic and photonic properties, and can be synthesized under conditions that are compatible with silicon device fabrication. Our research focuses on both deep sub-eutectic vapor-liquid-solid (VLS) growth of nanowires, and their formation via patterning and etching of semiconductor surfaces.  We use photoluminescence, time-resolved optical characterization and carrier transport measurements to probe the effects of nanowire diameter, strain and surface defect passivation on electronic structure.